What is the Process of Reverse Engineering an Electronic Chip |
Posted: March 20, 2023 |
For the semiconductor industry, electronic reverse engineering has always been the main axis of IC research and design. Can assist electronic IC design company in the development of new products required cost, time, manpower and technology for a comprehensive analysis. And in the circuit extraction, for the patented circuit, through the patent map database analysis and comparison to do a good job in patent avoidance. Electronic reverse engineering can make the whole IC from package to circuit layout. Use to restore the internal structure, dimensions, materials, made and steps one by one. And circuit layout can be restored to circuit design by circuit extraction. The reverse engineering process of electronic chips: 1. Sample preparation; 2. Chip photo data; 3. Sample anatomy layer by layer photo Flat Schematic; 4. Circuit extraction Hier. Schematic; 5. Circuit tidying Netlist; 6. Circuit simulation verification; 7. Layout design; 8. Circuit simulation check and acceptance; 9. Design service delivery data type; So how do we see clearly through the micro - and nano-scale circuits? Scanning electron microscopy (SEM) can be used to take pictures of large images up to 40,000 times and local images up to millions of times. SEM has two functions: one is that the product is defective. Used for failure analysis to find defects. In this case, it is usually only necessary to take a "partial photo". The second function is the reverse engineering of electronic ics discussed in this paper. In order to avoid patent disputes and do a good job in patent avoidance, the photo at this time should not be just a partial photo. A wide range of scans must be taken to see through all the lines in the IC. How to protect the result of electronic reverse engineering? A: Try to use CPLD, FPGA and other chips, and polish the chip mark. The schematic diagram is also not easy to analyze. B: Use encryption chips, such as Maxim's DS28E01-100. Sanding to remove mark before welding. The surface markings of other unpopular chips should also be worn off. This greatly increases the difficulty of electronic reverse engineering. C: The welding of the chip is encrypted manually. For example, the two feet of a chip are artificially welded together. The pcb is separated. In this way, a little unattention will ignore the problem. If there is a condition, it is better to connect the two feet under the BGA chip in principle design, so that it cannot be found without X-ray images. And X-ray imaging equipment, generally small companies or individuals are unlikely to have. D: Some techniques that can be obtained from the above reverse electronic engineering method. The necessity of secrecy is relatively poor. Some of these technologies can be selected and patented if conditions permit. This would provide a legal basis for reservation. To be clear: some technologies are company secrets, so it's not good to patent them, and reverse engineering for electronics is difficult. For example, an algorithm, in this case, even if it gets burned code is not easy to apply, there is no need to apply for a patent.
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